This work proposes a cell¿microelectrode model to be used on cell culture assays as an alternative to end-point protocols employed in cell growth and cell biometry applications. The microelectrode model proposed is based on the area overlap between the microelectrode sensor and the living cells as main parameter. This model can be applied to cell size identification, cell count, and their extension to cell growth, motility and dosimetry protocols. A procedure to fit the proposed model to microelectrode electrical performance is presented, enabling the decoding of empirical measurements and its interpretation in terms of number of cells. This fitting procedure depends on three parameters: microelectrode geometry, gap resistance between substrate attached cells and microelectrode and, mainly, on microelectrode area covered by cells. The model has been implemented employing Analog Hardware Descriptions Language (AHDL) to be incorporated also to mixed-mode simulation processes during circuit design flow.

Article - Sensors and Actuators, B: Chemical, Volume 176, Pags 605-610, 2013
ELSEVIER BV
DOI: 10.1016/j.snb.2012.09.083   » doi
ISSN: 0925-4005

This chapter reviews the main circuit strategies reported so far for the implementation of reconfigurable and adaptive CMOS Low-Noise Amplifiers (LNAs) intended for multi-standard wireless telecom systems. Different performance metrics are analyzed and compared, and a number of practical design considerations are given in order to optimize the performance of these kinds of LNAs in terms of Noise Figure (NF) and S-parameter programmability, with scalable power consumption. To this purpose, a circuit design methodology is presented which combines a mathematical model with electrical simulations. As an application of the proposed design methodology, a LNA Integrated Circuit (IC) implemented in a 1-V 90-nm CMOS technology is presented. The circuit consists of a two-stage inductively degenerated common-source configuration and uses MOS-varactor based tunning networks to make the resonant frequency continuously programmable within the band of interest. This allows the LNA to target the requirements of a number of commercial licensed standards, as well as any other operation modes in between. Practical implementation issues are discussed, considering the effect of circuit parasitics associated to both the chip package and integrated inductors, capacitors, varactors, as well as technology parameter deviations. Experimental results are presented to demonstrate the correct operation of the IC, showing a continuous tuning of NF and S-parameters within a 1.75-2.48 GHz band, and featuring {NF} < 3.7 {dB}, S21 > 19.6 {dB} and {IIP3} > - 9.8 {dBm} in a frequency range of 1.75-2.23 GHz.

Book Chapter - Integrated circuits for analog signal processing, pp 145-169, 2013
SPRINGER
ISBN: 978-1-4614-1382-0

This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations -going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues -from high-level behavioural modelling in MATLAB/SIMULINK, to circuit-level implementation in Cadence Design FrameWork II. As well as being a comprehensive reference to the theory, the book is also unique in that it gives special importance on practical issues, giving a detailed description of the different steps that constitute the whole design flow of sigma-delta ADCs.

Book - 432 p, 2013
WILEY
ISBN: 978-1-119-97925-8

Despite the fact that in the digital domain, designers can take full benefits of IPs and design automation tools to synthesize and design very complex systems, the analog designers' task is still considered as a 'handcraft', cumbersome and very time consuming process. Thus, tremendous efforts are being deployed to develop new design methodologies in the analog/RF and mixed-signal domains.
This book collects 16 state-of-the-art contributions devoted to the topic of systematic design of analog, RF and mixed signal circuits. Divided in the two parts Methodologies and Techniques recent theories, synthesis techniques and design methodologies, as well as new sizing approaches in the field of robust analog and mixed signal design automation are presented for researchers and R/D engineers.

Book - 381 p, 2013
SPRINGER
ISBN: 978-3-642-36328-3

Dynamic Vision Sensors (DVS) have recently appeared as a new paradigm for vision sensing and processing. They feature unique characteristics such as contrast coding under wide illumination variation, micro-second latency response to fast stimuli, and low output data rates (which greatly improves the efficiency of post-processing stages). They can track extremely fast objects (e.g., time resolution is better than 100 kFrames/s video) without special lighting conditions. Their availability has triggered a new range of vision applications in the fields of surveillance, motion analyses, robotics, and microscopic dynamic observations. One key DVS feature is contrast sensitivity, which has so far been reported to be in the 10-15% range. In this paper, a novel pixel photo sensing and transimpedance pre-amplification stage makes it possible to improve by one order of magnitude contrast sensitivity (down to 1.5%) and power (down to 4mW), reduce the best reported FPN (Fixed Pattern Noise) by a factor of 2 (down to 0.9%), while maintaining the shortest reported latency (3μs) and good Dynamic Range (120 dB), and further reducing overall area (down to 30×31μm per pixel). The only penalty is the limitation of intrascene Dynamic Range to 3 decades. A 128×128 DVS test prototype has been fabricated in standard 0.35μm CMOS and extensive experimental characterization results are provided.

Article - IEEE Journal of Solid-State Circuits, Volume 48, Issue 3, Pags 827-838, 2013
IEEE
DOI: 10.1109/JSSC.2012.2230553   » doi
ISSN: 0018-9200