Undersampling RF-to-Digital CT SD Modulator with Tunable Notch Frequency and Simplified Raised-Cosine FIR Feedback DAC »
This paper presents a continuous-time fourth-order band-pass Sigma-Delta (SD) Modulator for digitizing radio-frequency signals in software-defined-radio mobile systems. The modulator architecture is made up of two resonators and a 16-level quantizer in the feedforward path and a raised-cosine finite-impulsive- response feedback DAC. The latter is implemented with a reduced number of filter coefficients as compared to previous approaches, which allows to increase the notch frequency programmability from 0.0375fs to 0.25fs, while keeping stability and robustness to circuit-element tolerances. These features are combined with undersampling techniques to achieve an efficient and robust digitization of 0.455-to-5GHz signals with scalable 8-to-15bit effective resolution within 0.2-to-30MHz signal bandwidth, with a reconfigurable 1-to-4GHz sampling frequency.
Conference Paper -
IEEE International Symposium on Circuits and Systems ISCAS 2013
S. Asghar, J.M. de la Rosa and R. del Río
Abstract not avaliable
Lecture Notes in Electrical Engineering, vol. 233, pp V-IX, 2013
M. Fakhfakh, E. Tlelo-Cuautle and R. Castro-López
On the synchronization of 1D and 2D multi-scroll chaotic oscillators »
The guidelines to synchronize one-directional (1D) and two-directional (2D) multi-scroll chaos generators by means of Generalized Hamiltonian forms are presented. First, the multi-scroll chaotic oscillator is simulated at the electronic system level by applying state-variables and piecewise-linear approaches. Besides, we apply scaling procedures to modify the breaking points, slopes and frequency of the chaotic signals in order to reduce their excursion levels within practical values for electronic devices. Second, a chaotic synchronization scheme for multi-directional multi-scroll chaos generators is introduced. We use Generalized Hamiltonian forms approach to determine the synchronization conditions when one and two state-variables of the master system are sent to control the nonlinear functions in the slave system. Additionally, two schemes are set-up to transmit encrypted binary and analog signals by applying chaotic switching technique and additive chaotic masking, respectively. Both schemes are implemented by using traditional operational amplifiers. Finally, theoretical results are confirmed by performing numerical and SPICE simulation results.
Studies in Computational Intelligence, vol. 459, pp 19-40, 2013
J.M. Muñoz-Pacheco, E. Zambrano-Serrano, O.G. Félix-Beltrán, E. Tlelo-Cuautle, L.C. Gómez-Pavón, R. Trejo-Guerra, A. Luis-Ramos and C. Sánchez-López
Library for model-based design of image processing algorithms on FPGAs »
This paper describes a library (XSGImgLib) that includes parameterizable blocks to implement low-level image processing tasks on FPGAs. A modelbased design technique provided by Xilinx System Generator (XSG) has been used to design the blocks, which implement point operation (binarization) and neighborhood operations (linear and non-linear filtering) in grayscale images. The blocks are parameterizable for input/output data precision, window size, normalization strategy, and implementation options (area versus speed optimization). The paper includes the implementation results obtained after fixing these options and exemplifies the combination of several blocks of the library to build a complete design for image segmentation purposes.
Revista Facultad de Ingenieria, no. 68, pp 36-47, 2013
UNIVERSIDAD DE ANTIOQUÍA
L.M. Garcés-Socarrás, S. Sánchez-Solano, P. Brox and A.J. Cabrera
Diseño de sensores implantables para la adquisición de señales neurocorticales »
Abstract not avaliable
Date of defense: 10/05/2013
UNIVERSIDAD DE SEVILLA, IMSE-CNM