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ESD-MSD Mixed
Signal Design Cluster
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| Summary | |
| The Project's main objective is the development
of prototype building blocks of a chipset for high-speed communications
through the power lines, that will improve data rates using state of the
art mixed signal integrated circuits and DSP techniques.
Pilots tests will aim to prove the suitability of the power line for high speed communications. The building blocks will be integrated in demo boards and cabinets (as part of existing routers and/or DSLAMs) that will be used in the pilot tests. |
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| Main Objectives | |
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| Project Duration | |
| Start | September 1998 |
| End | May 2001 |
| Coordinator | Diseño de Sistemas en Silicio, S.L. (DS2), Spain |
| Partner | CISCO Systems, The Netherlands |
| Partner | Eidgenossische Technische Hochschule Zurich (ETHZ), Switzerland |
| Partner | Electricite de France (EDF), France |
Last update: January 31, 2001