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MIXMODEST
Mixed-Mode for Deep Submicron Technologies
Summary
  Dedicated design techniques and technology adaptations have allowed for the
implementation of mixed signal on chip. The wide spread of maximum integrated mixed signal systems, combining very complex digital and high performance analogue is prevented by the decrease of the analogue performance of a deep sub-micron digital technology.
Overcoming this stumbling is the major aim of the MIXMODEST project.

Main Objectives
 
The technical target of the MIXMODEST project is to develop design techniques that permit the implementation of mixed signals systems in the most advanced 0.35µm and 0.25µm deep sub-micron digital CMOS technology. Embedding advanced analogue functions such as front-ends, converters and back ends in complex digital integrated circuits is today based on extra analogue technology options that yield devices and components with reduced tolerances, such as accurate resistors and capacitors. These mixed signal technologies lag one generation behind of the most dense mainstream digital technology and therefore force to implement quite complex digital circuits in a less efficient manner. This constitutes a serious economical drawback for mixed signal systems that tend to have a relatively large area of digital circuitry (90%) and small area on analogue (10%). 

The final goal will be to achieve, in the next generation digital technology, the same analogue performance while keeping the same area for the analogue part and shrinking the digital by 50%. The main constraint is the lack of precision elements such as matched capacitors and resistors. Capacitors and resistors that can be made available in the digital technology will have an accuracy as low as 30% compared to 5% for analogue processes, while the matching behaviour is normally not known. Next to the less accurate devices, the main limitation is also the low power supply down to 2.4V as found in 0.25µm CMOS technology. This reduces the effective voltage and requires special measures to be taken to achieve the signal to noise ratio, including the effects of cross talk. The problem will have to be tackled by the introduction of innovative techniques on all levels of a design starting from the development and thorough characterisation of structures for active devices and components, over circuit techniques such as differential and current mode, up to architectures including self-calibration.


Motivation
  The most important objective is to obtain a design methodology including basic structures and circuits that will enable future state of the art analogue functions, such as front-ends, to be implemented in a basic mainstream digital 0.35 and 0.25 micron CMOS technology. This development will generate solutions to implement converters, buffers and drivers found at the interface of complex high speed wire-based communication systems in the most advanced and dense digital technology. Hence, a target of the project will be the incorporation of this methodology in the mixed-signal design environments of the partners. 

The whole approach will be demonstrated by means of real converter designs and a high speed xDSL driver. 


Project Duration
Start September 1998
End September 2001

 
Project Partners
Coordinator Alcatel Microelectronics, Belgium
Partner ChipIdea, Portugal
Partner Instituto de Microelectrónica de Sevilla (IMSE-CNM), Spain
Partner Instituto Superior Tecnico (IST), Portugal
Partner Katholieke Universiteit Leuven (KUL), Belgium
Partner University of Pavia, Italia

Last update: February 9, 2001