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ESD-MSD Mixed
Signal Design Cluster
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Arvena Messe Hotel, Nuremberg September 14, 2001
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| click title for abstract | ||
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| SUBSAFE Project Overview
(download PDF, 105kB) |
W. Wilkening | Robert Bosch |
| Measurements and Calibration
(download PDF, 989kB) |
M. Schenkel | ETHZ/IIS |
| 3D Full Chip-Level Simulation of
Minority Carriers
(download PDF, 282kB) |
N. Qu | Robert Bosch |
| Transient Simulations
(download PDF, 141kB) |
M. Schaldach | ETHZ/IIS |
| Method to Minimize Risk of Functional
Failure Induced by Substrate Current
(download PDF, 2555kB) |
P. Pfaeffli | ISE AG |
| GIF movie of 3-D Transient Potential Distribution
(download GIF, 1685kB) |
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| SUBSAFE Project Overview (PDF, 105kB) | |
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The aim of this first talk is to introduce the technical problems, to motivate the approach and to give the framework for the following, more specific presentations. Therefore project motivation, objectives, technical background, challenges and the resulting simulation guided approach will be presented. Specific problems and technical highlights will be mentioned and will lead to an overall conclusion. |
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| Measurements and Calibration (PDF, 989kB) | |
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Before device simulations can be applied to the evaluation of the effects of substrate current and to the effectiveness of protective measures, a few technology and device parameters have to be calibrated. This talk will introduce the calibration approach chosen and the measurements used for calibration. Furthermore, static and transient measurements of substrate current sources and effects will be presented, which give the basis for the validation of the succeeding device-simulations. |
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| 3D Full Chip-Level Simulation of Minority Carriers (PDF, 272kB) | |
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In Smart-Power and particularly in automotive applications pins may dive below ground and inject minority carriers in the substrate. Their impact via parasitic well-substrate-well transistors is extremely difficult to control. This is due to the large diffusion lenghts and to the 3D nature of the problem. Examples drawn from applications will be demonstrated for two different technologies. This presentation will focus on the relevant physical properties such as lifetime, backside metallization (Schottky contact), and temperature. The potential and the limits of generalization for different layouts and/or technologies will be discussed. |
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| Transient Simulations (PDF, 141kB) | |
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Transient current collection of a positively biased n-well, representing a n-tub of a controlling circuitry's device has been investigated by means of 2D device-simulations. Emphasis has been put on the transition from transient to static substrate current injection. Simulations have been performed under several different bias conditions and results are compared against each other. |
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| Method to Minimize Risk of Functional Failure Induced by Substrate Current (PDF, 2555kB) | |
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In this talk the results of the SUBSAFE project will be summarized. A method will be demonstrated showing how substrate current induced failure risks can be evaluated and minimized by measurement and simulations. Guidelines for reliable design in the case of a H-bridge topology will be formulated. |
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Last update: September 14, 2001