IMSE-Forum Seminar
Visit of Naresh Shanbhag to IMSE-CNM

In-memory Computing – Fundamentals, Current Trends, and Future Directions.
On March 2, 2023 we have had a presentation of the eminent prof. Naresh Shanbhag of the University Illinois Urbana-Champaign, who is of stay at the IMSE


Doctoral Thesis defense
Doctoral Thesis defense

Behavioral Modelling of CMOS SPADs based on TCAD Simulations.
Juan M. López Martínez
January 24, 2023

Post on the La Cuadratura del Círculo blog
Post on the La Cuadratura del Círculo blog

High-speed neuromorphic computing, an increasingly closer reality.
Rafaella Fiorelli


IMSE-Forum Seminar
IMSE-Forum Seminar

Error correcting codes for hyper-speed memory and data storage.
IEEE Distinguished Lecturer Prof. Xinmiao Zhang, Dept. of Electrical & Computer Engineering, Ohio State University


Green light for the financing with European funds of the DIGISOLAR project

The solar sensor project with Andalusian technology for satellites receives a subsidy from the program for Agrupaciones Empresariales Innovadoras (AEI) of the Ministerio de Industria, Comercio y Turismo, through Next Generation EU funds.


Proyecto NimbleAI
Kick-start of NimbleAI European project

The 19 project partners from across Europe gathered in Arrasate-Mondragón (Spain) to officially kick-start NimbleAI, the 3-year and 10M € research project which will improve energy-efficiency and performance of next-generation neuromorphic chips that sustain event-based vision.



New Director of the IMSE-CNM

IMSE researcher Teresa Serrano Gotarredona has been appointed as the new Director of the Instituto de Microelectrónica de Sevilla.


Education at IMSE

- Doctoral Studies
- Master Studies
- Degree Studies
- Final Degree Projects
- Internships


Recent publications

Band-Pass Sigma-Delta Modulation: The Path towards RF-to-Digital Conversion in Software-Defined Radio
J.M. de la Rosa
Journal Paper · Chips, vol. 2 no. 1, articles 44-69, 2023
MDPI    ISSN: 2674-0729
abstract      doi      

This paper reviews the state of the art on bandpass sigma-delta modulators (BP-sigma-deltaMs) intended to digitize radio frequency (RF) signals. A priori, this is the most direct way to implement software-defined radio (SDR) systems since the analog/digital interface is placed closer to the antenna, thus reducing the analog circuitry and doing most of the signal processing in the digital domain. In spite of their higher programmability and scalability, RF BP-sigma-deltaM analog-to-digital converters (ADCs) require more energy to operate in the GHz range as compared with their low-pass (LP) counterparts. This makes conventional direct conversion receivers (DCRs) the commonplace approach due to their overall smaller energy consumption. This paper surveys some circuits and systems techniques which can make RF ADCs and SDR-based transceivers more efficient and feasible to be embedded in mobile terminals.

Ultra-High-Resistance Pseudo-Resistors with Small Variations in a Wide Symmetrical Input Voltage Swing
F. Karami-Horestani and J.M. de la Rosa
Journal Paper · IEEE Transactions on Circuits and Systems II: Express Briefs
IEEE    ISSN: 1549-7747
abstract      doi      

This paper presents a new strategy and circuit configuration composed of serially-connected PMOS devices operating in the subthreshold region for implementing ultra-highvalue resistors required in very low-frequency active-RC filters and bio-amplifiers. Depending on the application, signal bandwidth for instance in bio-amplifiers may vary from a few mHz up to a maximum of 10 kHz. Three different resistor structures are proposed to achieve ultra-high resistance. While ranging in the order of several TY, the proposed ultra-high-resistance pseudoresistors occupy a small on-chip silicon area, which is one of the main issues in the design of analog front-end circuits in ultra-low power implantable biomedical microsystems. In addition, these ultra-high-value resistors lead to the use of a small capacitance to create a very small cut-off frequency. Therefore, the large area to implement capacitances is also considerably reduced. The proposed resistor structures have very small variations about 7% and 12% in a wide input voltage range (-0.5 V +0.5 V), thus significantly improving the total harmonic distortion of bioamplifiers and the analog front-end of the system. Simulation results of different circuits designed in a 180nm CMOS technology, are shown to demonstrate the advantages of the proposed ultra-high-resistance pseudo-resistors.


A self-powered asynchronous image sensor with independent in-pixel harvesting and sensing operations
R. Gomez-Merchan, J.A. Leñero-Bardallo and A. Rodríguez-Vázquez
Conference · IS&T International Symposium on Electronic Imaging 2023

A self-powered asynchronous sensor with a novel pixel architecture is presented. Pixels are autonomous and can harvest or sense energy independently. During the image acquisition, pixels toggle to a harvesting operation mode once they have sensed their local illumination level. With the proposed pixel architecture, most illuminated pixels provide an early contribution to power the sensor, while low-illuminated ones spend more time sensing their local illumination. Thus, the equivalent frame rate is higher than the one offered by conventional self-powered sensors that harvest and sense illumination in independent phases. The proposed sensor uses a Time-to-First-Spike readout that allows trading between image quality and data and bandwidth consumption. The device has HDR operation with a dynamic range of 80 dB. Pixel power consumption is only 70 pW. The article describes the sensors and pixel’s architectures in detail. Experimental results are provided and discussed. Sensor specifications are benchmarked against the art.

CMOS Front End for Interfacing Spin-Hall Nano-Oscillators for Neuromorphic Computing in the GHz Range
R. Fiorelli, E. Peralias, R. Mendez-Romero, M. Rajabali, A. Kumar, M. Zahedinejad, J. Akerman, F. Moradi, T. Serrano-Gotarredona and B. Linares-Barranco
Journal Paper · Electronics, vol. 12, no. 1, article 230, 2023
MDPI    ISSN: 2079-9292
abstract      doi      

Spin-Hall-effect nano-oscillators are promising beyond the CMOS devices currently available, and can potentially be used to emulate the functioning of neurons in computational neuromorphic systems. As they oscillate in the 4-20 GHz range, they could potentially be used for building highly accelerated neural hardware platforms. However, due to their extremely low signal level and high impedance at their output, as well as their microwave-range operating frequency, discerning whether the SHNO is oscillating or not carries a great challenge when its state read-out circuit is implemented using CMOS technologies. This paper presents the first CMOS front-end read-out circuitry, implemented in 180 nm, working at a SHNO oscillation frequency up to 4.7 GHz, managing to discern SHNO amplitudes of 100 mu V even for an impedance as large as 300 ohm and a noise figure of 5.3 dB(300 ohm). A design flow of this front end is presented, as well as the architecture of each of its blocks. The study of the low-noise amplifier is deepened for its intrinsic difficulties in the design, satisfying the characteristics of SHNOs.


IMSE corporate video

What we do

Our main area of specialization is the design of CMOS analog and mixed-signal integrated circuits and their use in different application contexts such as wireless communications, data conversion, smart imagers & vision sensors, biomedical devices, cybersecurity, neuromorphic computing and space technologies.

The IMSE-CNM staff consists of approximately one hundred people, including scientists and support personnel. IMSE-CNM employees are involved in advancing scientific knowledge, designing high level scientific-technical solutions and in technology transfer.


IMSE-related sites