|
|
|
A 17bit@40kHz CMOS Fourth-Order  
Modulator
Team: Fernando Medeiro, Belén
Pérez-Verdú, Angel Rodríguez-Vázquez and J.L.
Huertas
Date: 1993
| Physical Data |
- 1.2µ m CMOS n-well, double poly,
double metal.
- 0.94mm2
(excluding pads)
- 250 transistors.
|
Electrical Data |
- Switched-Capacitor fully-differential circuitry.
- 5v@10mW.
- 5MHz clock frequency (on-chip).
- 40kHz output rate.
- 102dB dynamic range (16.7bit).
- 98.2dB SNR-peak.
- 1-V peak input signal.
|
Design Technique: |
- Automatized modulator and cell sizing.
- Analog full-custom, digital semicuston.
- Switched-Capacitor circuits:
- Folded-cascode OTA's with degenerated
mirror CMFB.
- Single-brach integrators with phase
delay feed-through compensation.
- Fast regenerative latched comparators.
- Layout
- Guard rings, shielding, simmetry.
- Separate A and D supply lines.
|
Features and Applications: |
- Cascaded arquitecture.
- High-precision A-to-D conversion.
- Low power consumption.
|
High-order
modulators (M)
allow to reduce the required oversampling ratio for a given resolution
and hence to increase the useful frequency range. An extended technique
to design high-order
modulators uses a cascade of first- and second-order single-bit modulators
to obtain a dynamic range similar to that of single-loop structures, with
no stability problems. A considerable activity in the monolithic design
of these architectures has resulted in several working SC silicon prototypes
with resolution of up to 17bits in audio and 14bits in sub video. The
M here
uses a fourth-order 2-2 cascade architecture (Fig 2a). Such architecture
was choosen for its robustness after a detailed comparison of available
4th-order cascade Ms
from an ideal viewpoint and taking into account circuit imperfections
[Mede98]. The schematic of the fourth-order M
using fully-differential SC circuits is shown in (Fig 2c). It was sized
by using proprietary CAD tools for the optimized design of Ms
[Mede95]
References:
- [Mede98] F. Medeiro, B. Pérez-Verdú,
J. M. de la Rosa and A. Rodríguez-Vázquez: "Fourth-order
Cascade SC
Modulators: A Comparative Study", IEEE Transactions on Circuits
and Systems, July 1998.
- [Mede95] F. Medeiro, B. Pérez-Verdú,
A. Rodríguez-Vázquez and J.L. Huertas: "A Vertically-Integrated
Tool for Automated Design of Sigma-Delta Modulators", IEEE J. of
Solid-State C. Vol.30, pp. 762-772, July 1995.
Images List:
|
|
