A 13-bit 4-MSample/s 77-mW CMOS Modulator.

Figure 1: Die layout

Figure 2: Architecture and Schematics

a) 4th-order 2-1-1 cascade multi-bit M

b) Fully-differential SC schematic (analog part)

c) Fully-differential two-stage Miller-compensated OTA and dynamic CMFB net

d) Fully-differential 4-bit A/D and D/A converter

Figure 3: Measurements

a) Two-layer PCB used for testing	b) Measured output spectrum
c) Comparison of the different order noise shaping: Output spectrum of the first-stage (blue), first- and second-stage combined (red), and complete modulator (black).	d) In-band (DC-2MHz) signal-to-(noise + distortion) ratio as a function of the input level.